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New Semiconductors Provide Higher Speeds and Lower Power Consumption/China Invests in Domestic Chip Manufacturing and Research, Business and Industry Trends Analysis

The standard process for commercial-use semiconductor manufacturing as of 2016 was 3-D 22-nanometer chips, but this will rapidly evolve to 14-nanometer and smaller chips.  Prior to 2007, most manufacturers were building two-dimensional chips using 90-nanometer wafers.  Intel’s leap to 45-nanometer technology in 2007 approximately doubled the number of transistors that fit within a given space on a chip.  The nanometer measurement refers to the smallest average feature on a chip.  The smaller the measurement, the more transistors can be incorporated into a chip of given size.  A nanometer is one billionth of a meter.  A 22-nanometer chip is small enough that 4,000 of them can be spread across the width of a human hair.  Assuming that even smaller transistors are developed about every two years, many analysts expect 5-nanometer chips sometime after 2020.

A significant component in the newer 3-D chip is its ability to greatly limit the leakage of current as it flows across the chip.  The raised, 3-D design, called FinFET, has a fin-like structure above the transistor surface, which takes less space on a chip and allows current conduction on three sides, making it much more powerful and features significant energy savings over previous technology.  Intel’s 3-D 22-nanometer chips can house about 8.75 million transistors per square millimeter, which makes graphics capabilities inherent in entertainment devices exponentially higher.  The first of these chips, code named Ivy Bridge, launched in mid-2012 for use in desktop and laptop processors.  In 2013, Intel achieved volume production of 3-D 22-nanometer chips for tablets and smartphones.

The next step in high-tech chips is 14-nanometer technology, and a significant amount of money is being invested by Intel and other firms in setting up their plants (“fabs”) to take advantage of this better technology.  In September 2011, IBM, Intel and Samsung announced a five-year, $4.4 billion joint venture for research and development that will lead to advances in 14-nanometer technology.  Meanwhile, IBM has a separate partnership with ARM for the development of 14-nanometer processes, and Intel invested $5 billion to build a new plant in Arizona.  Elsewhere, Samsung began production of 14-nanometer chips in December 2014.

Intel is producing 14-nanometer chips on 300 millimeter wafers, a significant breakthrough in chip manufacturing.  The new line of chips is called “Quark,” used initially in wearable devices, skin patches or medical applications, after first appearing in the Galileo development board in late 2013.  In early 2015, Intel launched Broadwell fifth-generation core processors with vPro enhancements for use in fan-less ultrathin laptops and high end tablets, and announced plans to use the new chips later in the year in traditional desktop PCs and laptops. 

The miniaturization trend in semiconductors in recent years can be described in terms of cost.  The first Intel 80386 chip in 1982 provided several thousand transistors at a cost of $1.  Fast forward to 2012 and the cost fell to 20 million transistors per dollar.  However, consultant Linley Group predicts that over the mid-term, the cost of making ever-smaller chips will rise, perhaps yielding only 19 million transistors for the dollar.  Worldwide semiconductor sales for 2016 were expected to reach $335 billion, according to the Semiconductor Industry Association.

The government in China is backing an initiative to develop chips domestically, instead of relying on those made by Intel, AMD and others.  In 2015, China announced plans to invest $161 billion over 10 years in public and private funds aimed at boosting its domestic capabilities in semiconductor research, development and manufacturing.  Historically, the nation had been nearly totally dependent on foreign technologies.  The Institute of Computing Technology in China developed the Loongson or Dragon chip which powered a computer as early as 2006 (the chip is manufactured by China-based Jiangsu/Lemote Technology Co.).  Loongson is not as sophisticated as the standard x86-type chips.  Instead, Lemote is relying on open source operating environments and software.  The Loongson made a quantum leap from powering netbooks and set-top boxes to supercomputers in 2012 when it found use in China’s Sunway BlueLight MPP supercomputer and the Dawning 6000 supercomputer.  Ultimately, China hopes to export its semiconductors to the U.S. and other major nations. 

U.S.-based Intel has already invested heavily in manufacturing facilities in China that build microprocessors.  In the fall of 2015, it announced a $3 billion expansion and upgrade of its Chinese operations.  Plunkett Research also expects significant investment in facilities and joint ventures within China by other global chip firms.

Qualcomm is working on processors, modeled on biological brains, called neuromorphic chips.  First proposed by Caltech neuroscientist Carver Mead in 1990, neuromorphic chips mimic electrical activity of brain neurons and synapses, allowing them to detect and predict complex data patterns (unlike traditional chips that make calculations at blinding speeds).  Qualcomm developed a robot named Pioneer that, powered by a neuromorphic smartphone chip, can sort items that seem to go together.  In a 2014 demonstration, Pioneer’s internal camera observed a researcher placing an action figure toy in one of several bins, and then proceeded to find similar figures among a jumble of toys and games and deposit them in the correct bin.  Future applications of the technology may include machines that can respond to visual and auditory data and adjust their functions to better interact with the world around them.

The future of semiconductors will more likely be a move away from silicon to carbon nanotubes.  IBM expects that advancing technologies will eventually enable a single chip to contain as many as 20 billion transistors.  Silicon as a building block for chips has a limit as to just how small the resulting transistor can be.  Intel will open a plan in Arizona in 2021, Fab 42, that will build chips on 7-nanometer scale with several billion transistors per chip.

 

 


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